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Brevet : EP0928486 - DISPOSITIF ET PROCEDE D'ESSAI DES DES D'UN CIRCUIT INTEGRE DANS UN MODULE DE CI...
Titre
DISPOSITIF ET PROCEDE D'ESSAI DES DES D'UN CIRCUIT INTEGRE DANS UN MODULE DE CIRCUIT INTEGRE
N° et date de publication de la demande
EP0928486 - 14/07/1999
Type de la demande
A1
N° et date de dépôt
EP97938416.1 - 20/08/1997
N° et date de priorité
US71817396 - 19/09/1996
Classification CIB
H01L 23/12 ; G01R 31/28 ; G11C 5/00 ; G11C 29/00 ; G11C 29/14 ; G11C 29/46 ; H01L 21/66 ; H01L 25/04 ; H01L 25/18 ; H04Q 11/04
Classification CPC
G01R 31/2884 ; G11C 29/46 ; G11C 29/785 ; G11C 29/80 ; G11C 29/808 ; H01L 22/22 ; H04J2203/0062 ; H01L2224/48091 ; G11C 29/00 ; H01L 22/22 ; G11C 29/785 ; G11C 29/80 ; H04J2203/0062 ; G01R 31/2884 ; G11C 29/46 ; G11C 29/808 ; H01L2224/48091
Famille de brevets
ATE208953T1 ; TW356576B ; JP2001500659A ; US5796746A ; KR20000048488A ; WO9812706A1 ; AU4074397A ; DE69708314T2 ; EP0928486A1
Abrégé
An IC module, such as a Multi-Chip Module (MCM), includes multiple IC dice each having a test mode enable bond pad, such as an output enable pad. A fuse incorporated into the MCM's substrate connects each die's test mode enable pad to one of the MCM's no-connection (N/C) pins, and a resistor incorporated into the substrate connects the test mode enable pads to one of the MCM's reference voltage pins. By applying a supply voltage to the test mode enable pads through the N/C pin, a test mode is initiated in the dice. Once testing is complete, the fuse may be blown, and a reference voltage applied to the test mode enable pads through the reference voltage pins and the resistor disables the test mode in the dice and initiates an operational mode. As a result, dice packaged in IC modules may be tested after packaging. A method for performing such testing once the test mode has been initiated and for repairing any failing elements found during testing, includes providing test signals to the dice, receiving response signals from the dice, evaluating the response signals to identify any failing elements in the dice, programming the failing elements addresses into anti-fuses in the dice with a programming voltage, confirming that the addresses are programmed by determining the resistance of the anti-fuses, re-testing the dice, receiving response signals from the re-tested dice, and evaluating the response signals to confirm all repairs.
INTERVENANTS
Déposant
MICRON TECHNOLOGY INC (MICRON TECHNOLOGY, INC.) - US
Titulaire
MICRON TECHNOLOGY, INC.
Inventeur
FARNWORTH WARREN M (FARNWORTH, WARREN, M.) - US
WARK JAMES M (WARK, JAMES, M.) - US
NELSON ERIC S (NELSON, ERIC, S.) - US
DUESMAN KEVIN G (DUESMAN, KEVIN, G.) - US
Mandataire
V.O. PATENTS & TRADEMARKS - PO BOX 87930 2508 DH THE HAGUE - NL
STATUT EN FRANCE : Brevet EP sans effet
Délivrance
14/11/2001
Non remise de traduction du brevet
27/09/2002 (BOPI 2002-39)
